Technical Field
The disclosure relates to a wiring substrate and a method of manufacturing the same.
Related Art
In the related art, a wiring substrate for mounting thereon electronic components such as a semiconductor chip has been known. An example of the wiring substrate has a structure where wiring layers formed on both surfaces of a base material are connected to each other via through-conductors in via holes penetrating the base material.    [Patent Document 1] Japanese Patent Application Publication No. Sho.59-22393A    [Patent Document 2] Japanese Patent Application Publication No. Hei. 6-104546A    [Patent Document 3] Japanese Patent Application Publication No. 2005-19918A
As described later in paragraphs of preliminary matters, a manufacturing method of the wiring substrate includes processes of forming via holes in the base material having copper foils formed on both surfaces from above and forming a metal-plated layer toward an upper side from the copper foil of bottoms of the via holes to connect the upper and lower copper foils.
At this time, when there occurs a deviation in plating rate in the via hole, the metal-plated layer and the upper copper foil may not be connected to each other at one end-side in the via hole, so that the reliability of the via connection is not obtained.